Current decay control in switched reluctance motor

ABSTRACT

A control circuit (10) for controlling the residual or tail current decay in a single phase or polyphase SRM winding when a phase is switched from active to inactive. A Hall-effect type sensor (30) senses rotor position of the SRM. Current flows through a winding (W) of the motor when the motor phase winding is active; and, current flow into the winding decays to zero when the phase becomes inactive. Semiconductor switches (22) direct current flow into the winding when the phase is active and then redirect residual energy in the winding between an energy recovery circuit and an energy dissipation circuit when the phase becomes inactive. A PWM signal generator (44) provides PWM operating signals to the switches to control current flow first into the winding and then between the recovery and dissipation circuits. A control module (42), or microprocessor (52) with a PWM output, is responsive to rotor position information for controlling operation of the PWM signal generator. The signal generator provides PWM signals having one set of signal characteristics when there is current flow to the winding and a different set of characteristics when there is not. This produces alternate intervals of zero voltage and forced commutation residual current decay while the phase is inactive. During the decay interval, both the PWM frequency and pulse duty cycle are variable to produce a current decay scheme which eliminates ringing and motor noise.

.Iadd.REISSUE APPLICATION

This application is a Reissue application of U.S. Pat. No. 5,446,359,issued on Aug. 29, 1995 from the application Ser. No. 08/175,268, filedDec. 29, 1993. .Iaddend.

BACKGROUND OF THE INVENTION

This invention relates to switched reluctance (SRM) motors and, moreparticularly, to a current decay control circuit for such motors.

Switched reluctance, or SRM motors are well-known in the art. Oneproblem with operating these motors is noise caused by the recovery ofcurrent in the motor phase windings as each phase is switched at the endof its cycle. It will be understood that the current representing theenergy input of a particular phase is supplied to the phase windingsduring that phase's active portion of a switching cycle. As the motor isswitched from one phase to another, the residual energy in thedeactivated winding decays off. This energy typically representsapproximately thirty percent (30% ) of the energy supplied to the phasewinding during its active period and is referred to as the "tail decayenergy". Since the phase winding is an inductive element, it attempts tomaintain the current flow through the winding; even though the energymust be substantially dissipated before the winding is re-energizedduring the next phase cycle. Accordingly, the decay must be a rapiddecay. One effect of this energy reduction is the ringing effect whichis caused at the transition between the active and inactive portions ofthe phase current curve. This can be seen as the abrupt transition inslope in the current curve between the shallow slope representing theactive portion of the cycle and the steep slope where the current isdriving to zero when the phase becomes inactive. The result of thisringing or transfer of forces into the motor frame causes noise, andthis noise is on the order of 50 dBa.

Commutation circuits are used to control switching between motor phasesas a function of various motor operating parameters. Such circuitstypically employ a pulse width modulator (PWM). PWM circuits, inaddition to controlling the application of voltage to the motor phasescan also be used to control the residual current decay. These circuitsoperate to control this decay in accordance with a defined algorithm.However, it is a drawback of these decay control circuits that they usea conventional 100% forced commutation decay; and, as such, they tend toaggravate the noise problem. One attempt at decay is suggested by C. Y.Wu and C. Pollock in their paper Analysis and Reduction of Vibration andAcoustic Noise in the Switched Reluctance Drive; (IEEE Proceedings,Industrial applications Section, 28th, Annual Meeting, October 1993).The approach described in this paper involves a zero voltage decay ofthe current in a phase winding, when the phase is switched "off", over aperiod equal to one-half the resonant time period of the motor, and witha subsequent forced commutation of the remainder of the "off" time. Thedrawback with this approach is that there is but one decay intervaldivided into two segments. As a result, the degree of control over theslope of the curve as the current is driven to zero is not as flexiblein significantly reducing the noise.

While the above approach may be effective, there are nonetheless otherapproaches which may be more effective to facilitate tail decay whilereducing noise.

SUMMARY OF THE INVENTION

Among the several objects of the present invention may be noted theprovision of a control circuit for controlling the residual or tailcurrent decay in a motor winding; the provision of such a controlcircuit which controls tail current decay so as to lessen motor noise atleast 10 dBA from current noise levels; the provision of such a controlcircuit which integrates both hard chopping and soft chopping currentdecay control techniques; the provision of such a current controlcircuit which provides both types of chopping using but a single gatedrive; the provision of such a control circuit which is usable with both2-phase and 3-phase SRM's such as a 12-6, 2-phase SRM and a 6-4, 3-phaseSRM; the provision of such a control circuit which is readilyincorporated into a PWM type controller for controlling overall averagevoltage applied to the respective phases of a SRM; the provision of sucha control circuit which reverses the pulse width characteristics of aPWM signal used to control current flow when a winding phase is inactivethereby to help slow the rate at which current goes to zero while thephase is inactive; the provision of such a control circuit employing twosets of switches one set of which is either activated or deactivated asthe motor phases are switched and the other set of which is modulated byPWM signals; the provision of such a control circuit to control both thefrequency and/or duty cycle of PWM signals when a phase is switched fromactive to inactive thereby to better control the slope of the curve ofthe decay current; the provision of such a control circuit whichcontrols switching of the winding between energy recovery and energydissipation circuits to drive the residual current to zero; theprovision of such tail current control circuit which is additionallyeffective to help reduce noise in SRM's operating at low speed/hightorque conditions where normalized ovalizing forces which also producenoise in SRM's are lower than at high speed/low torque motor operatingconditions; the provision of such a control circuit to employ amicroprocessor which can produce a wide range of decay schedules basedupon particular motor conditions; the provision of such a controlcircuit which can operate at frequencies at least twice the resonantfrequency of the motor; and, the provision of such a control circuitwhich is a low cost, reliable circuit which functions to reduce noisethroughout the range of SRM operation.

In accordance with the invention, generally stated, a control circuit isused for controlling residual or tail current decay in a single orpolyphase SRM. A Hall-effect type magnetic sensor senses rotor positionof the SRM. Current flows through the winding when the motor phaserepresented by the winding is active; and, current flow into the windingceases when the phase becomes inactive. Semiconductor switches directcurrent flow into the winding when the phase is active and also helprecover or dissipate residual energy in the winding when the phasebecomes inactive. This is accomplished by switching the winding betweenan energy recovery circuit and an energy dissipation circuit in adefined manner. A PWM signal generator provides PWM operating signals tothe switches to control current flow into the winding and its subsequentrecovery or dissipation. A PWM control module, or microprocessor withPWM output, is responsive to the Hall sensor for controlling operationof the PWM signal generator. As a result, the signal generator providesPWM signals having signal characteristics which differ between whenthere is current flow to the winding and when there is not. Thefrequency and duty cycle of the PWM signals when the phase is inactiveare variable to control the slope of current decay and reduce motornoise. Other objects and features will be in part apparent and in partpointed out hereinafter.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a graph depicting the current waveform in one phase of a SRMand illustrates tail current decay in the current waveform;

FIGS. 2A and 2B are graphs of SRM phase current and voltage waveformsrespectively and illustrate a soft chopping operation of a currentcontroller for the SRM;

FIGS. 3A and 3B are graphs similar to FIGS. 2A and 2B but for hardchopping operation of the current controller;

FIGS. 4A-4C illustrate a gate signal used for soft chopping during thepower "on" portion of a SRM phase (FIG. 4A), as well a simplifiedschematic of the circuit for both the power "on" (FIG. 4B), and power"off" or current decay portions (FIG. 4C) of the phase;

FIGS. 5A-5C represent an inverted gate signal used during the phase"off" mode of motor operation (FIG. 5A) and simplified schematics ofsoft chop (FIG. 5B) and hard chop (FIG. 5C) circuits for current decay;

FIG. 6 is a schematic of a first embodiment of a tail current decaycontrol circuit of the present invention;

FIG. 7A is a schematic of a portion of the signal generating modules forproducing operating signals used to provide hard and soft chopping ofthe tail current;

FIG. 7B represents a microprocessor with PWM output capability forproducing operating signals used to provide the hard and soft chopping;

FIG. 8 is a graph similar to FIG. 1 and represents a prior art tailcurrent decay scheme;

FIG. 9A is another graph similar to FIG. 1 and represents the tailcurrent decay scheme as implemented by the present invention, and FIG.9B represents an enlarged portion of the tail current decay;

FIG. 10 is a graph illustrating the reduction in motor ringingachievable with the present invention; and,

FIGS. 11A-11D represent various PWM frequency and duty cyclecombinations by which current decay is controlled.

Corresponding reference characters indicate corresponding partsthroughout the drawings.

DESCRIPTION OF PREFERRED EMBODIMENTS

Referring to the drawings, a switched reluctance motor (not shown) is amotor having 1,2,3,4, or 5 phases and is typically a multiple polemotor. Examples of such motors are a 12-6, 2-phase motor, or a 6-4,3-phase motor. In operation, each respective phase is energized andde-energized in a sequential manner. The length of time each phase isactive is based on various operating parameters and various controlschemes have been implemented to determine when switching should occurfrom one phase to the next. During the interval a phase is active aphase winding W of that phase is supplied current. An idealized currentprofile for the winding is shown in FIG. 1. As depicted in the graph,power to the phase (current to the winding) commences at time T₀.Current is then applied to winding W until a time T₁ at which time theparticular phase is deactivated or de-energized. As indicated in FIG. 1,there is a significant amount of energy in winding W at this time, andthis residual energy must now be recovered or dissipated prior to thephase being reactivated. The current flow which occurs through the phaseat this time is a zero volt, tail current decay flow of current and thecurrent flow takes place during the interval from T₁ -T₂.

As shown in FIG. 1, when current input into the phase stops at time T₁,the slope of the curve is relatively shallow. However, the slope of thecurve as the tail current is driven to zero is very steep. It is knownthat as the rotor teeth of a motor sweep past the motor's stator teeth,a deflection is caused by the ovalizing forces generated within themotor. When this deflection is accompanied by the abrupt transition inenergy which occurs at time T₁, the result is a pronounced ringing whichis shown by the solid line curve in FIG. 10. This ringing producesnoise. There are two ways of reducing the residual or tail current tozero. One such way is to reduce the current gradually; i.e., try tocreate a shallow slope of the curve from T₁ to T₂. The other way is todrive the current down abruptly; i.e., to effect a steep curve. Thefirst technique is referred to as soft chopping and the latter as hardchopping. The problem with using soft chopping exclusively is thatalthough it results in less noise, it takes too long. Residual currentcannot reach zero before time T₂. The problem with hard chopping is thatalthough current is driven to zero by time T₂, this approach creates theringing referred to above.

In FIG. 2A, a current waveform similar to that shown in FIG. 1, showscurrent chopped in accordance with the "soft" chopping technique. Thatis, a pulse width modulated signal having an amplitude range of 0v.-+Vv. is applied to the phase current. It will be noted that a rippleis produced on the current even during the active portion of the phase.Again, a drawback with this approach is the very slow rate at whichcurrent is driven to zero.

In FIGS. 3A and 3B, the approach known as "hard" chopping isrepresented. As shown in FIG. 3B, hard chopping differs from softchopping in that the pulse width modulated signal has an amplituderanging from -Vv.-+Vv. Application of this signal to the phase has theeffect of driving the current toward zero faster than is possible withthe soft chopping signal approach. However, a greater ripple is imposedon the current supplied to the phase winding even during the activeportion of the phase; and, the forces produced by this increased downdriving of the current increases motor noise.

A third approach is shown in FIG. 8 and reflects the approach by MessersWu and Pollock in their paper referred to above. As before, current isapplied to a phase winding W from time T₀ -T₁. From time T₁ to a timeT_(x), current is allowed to zero volt decay (i.e., there is no signalapplied to the phase to drive the current toward zero) which correspondsto soft chopping. From time T_(x) to time T₂, a forced commutationsignal is applied to the phase to complete driving the current to zero.This corresponds to hard chopping. The interval from T₁ -T_(x) is aperiod equal to one-half the resonant time period of the motor. Theeffect of this approach is to make the slope of the curve from time T₁-T_(x) shallower than would occur if the current were merely hardchopped to zero. This has the effect of reducing the ringing. After thisinitial period, the current is hard driven to zero. However, becausesome of the energy in the phase is dissipated by the time hard drivingoccurs, the noise produced by the ringing is less pronounced. Whilebeneficial, this approach is limited because there is only one softdriving and one hard driving period within the interval T₁ -T₂. Thislimits the degree of control which could be effected to further reduceringing and noise.

A circuit of the present invention for controlling residual or tailcurrent decay in a phase winding W of a polyphase SRM is indicatedgenerally 10 in FIG. 6. It will be understood that while the followingdescription relates to tail current decay control for one motor phase,circuit 10 is operable with respect to all motor phases. As described,current and voltage are applied to the phase winding during eachinterval when the phase is active, the voltage and current being cut-offfrom the phase winding when the phase becomes inactive. The remainingenergy in the phase winding is then recovered or dissipated dependingupon a circuit configuration in which the winding is connected. A firstcircuit configuration includes the bus capacitor C, which is connectedto phase winding W when the phase is inactive, to recover energy fromthe phase winding. The capacitor is connected in parallel with a seriesconnected resistor and capacitor R1 and C2. These circuit elements arealso parallel connected with a resistor R2. Resistor R1 is, for example,a 10 ohm resistor, resistor R2 a 100K ohm resistor, and capacitor C2 a0.22 microfarad capacitor. Resistor R2 is used to trickle down energy inthe capacitor C when the drive is off. Resistor R1 and capacitor C2 forma high frequency filter against voltage spikes which otherwise causenoise in the circuit.

In FIG. 6, winding W is shown connected between rails L1 and L2 viadiodes D1 and D2. The diodes and winding form a forced commutation orenergy dissipation loop when switches of a switch means 16 are open.Lines L1 and L2 are connected across the output of a full-wave bridgerectifier 12 which is used to rectify the 115VAC input to the motor. Thebridge output and bus capacitor are commonly connected at respectivenodes 14a and 14b.

To further help in understanding tail current decay, FIG. 4A illustratesa PWM gate signal in which the "on" interval of the signal issubstantially less than the "off" portion of the signal. During the "on"portion, a d.c. voltage is applied to the phase winding W (see FIG. 4B).During the "off" portion of the signal, no voltage is applied to thewinding. Rather, during this interval, the winding is connected in aclosed-loop circuit with a diode D1 (see FIG. 4C) to produce a zerovoltage current decay of the current impressed across the winding. InFIG. 5A, the signal used to produce tail current decay in the phase isalso a PWM signal. Now, the "on" interval of the pulse is longer thanthe "off" interval. During the longer "on" interval, a switch S1 isclosed to allow the winding W current to circulate through diode D1.During the "off" interval of each pulse, respective switches S1 and S2on opposite sides of the winding are open. The winding is now connectedthrough two diodes D1 and D2 to a bus capacitor C which is associatedwith the upper rail of the power input to the motor. Capacitor C is astorage capacitor which is charged with the tail decay current. Withrespect to FIGS. 5B and 5C, FIG. 5B represents a soft chopping circuitconfiguration, and FIG. 5C a hard chopping circuit configuration.

Next, circuit 10 includes the switch means 16 for connecting phasewinding W into a circuit including capacitor C when the phase becomesinactive. Switch means 16 includes respective first and second sets 18,20 of switches with set 18 of switches being connected on one side ofthe phase winding and the set 20 of switches on the other side thereof.Both sets of switches are comprised of two semiconductor switches whichare shown in FIG. 6 to be MOSFET's 22. It will be understood that othersemiconductor switches could also be used without departing from thescope of the invention. In each set of switches, the pair of switches isconnected in parallel, this being done to increase switching capability.Also, each MOSFET has a gate circuit which includes a resistor R3connected in parallel with a diode D3. Each resistor R3 is, for example,a 100 ohm resistor. The input side of each pair of gate input elementsis connected together at respective nodes 24a, 24b. As is describedhereinafter, input signals to each set of switches is supplied throughmodes 24a, 24b.

A sensing means 28 is provided for sensing the motor's rotor position.Means 28 includes a Hall effect sensor 30 which operates in theconventional manner. Each set of switches has an associated power supply32, 34. Hall effect sensor 30 is connected to the power supply 34 whichis associated with set 20 of switches. Both power supplies are similarin configuration. Each power supply includes a step down transformer 36one side of which is connected to the 115 VAC input power. Rectifyingdiodes D4 are connected across the output side of the transformer andare commonly connected at respective nodes 38a, 38b. The transformed,rectified input voltage is then impressed across a zener diode Z1through a resistor R4. The zener diode clamps to the input voltage tothe sets of switches to 18 V., for example. A filter capacitor C3 isconnected in parallel across each zener diode. The resultant voltageoutput of power supply 32 is connected to the gate-source portion of therespective MOSFET's 22 of switch set 18, one side of capacitor C3 beingconnected to node 24a on the gate input side of the set through aresistor R5. One side of capacitor C3 of power supply 34 is connected toan integrated circuit (IC) 40 of a control means 42 which controlsrouting of operating signals which are generated as describedhereinafter. The other side of this second capacitor C3 is connected tothe node 24b of switch set 20 again through a resistor R5.

Referring to FIGS. 6 and 7A, a signal generating means 44 providesoperating signals to switch means 16 to switch phase winding W into thecircuit including bus capacitor C. As shown in FIG. 7A, means 44includes two interconnected model number 555, IC timing chips 46a, 46b.Means 44 is connected across nodes 48, 50 of power supply 34 to providepower to the chips. Chip 46a has pins 1 and 5 which are connectedtogether through a capacitor C4. Pins 1 and 8 of the chip are connectedto one side of the power input at a node 52a, pin 1 being so connectedthrough a capacitor C5. A voltage divider network comprising a resistorR6, potentiometer P1, and capacitor C6 extends across the power lines tosignal generating means 44. Pin 6 of chip 46a is connected to one sideof the potentiometer, with pin input 7 being connected to the wiper armof the potentiometer. A diode D5 is connected across these two pins. Pin3 of the chip is connected to the base of a transistor Q1 through aresistor R7. Pins 2 and 6 are commonly connected as are pins 4 and 8.The output of transistor Q1 is connected to pin 2 of chip 46b. This pinis also connected to the one side of the power to the signal generatingmeans through a resistor R8. As with chip 46a, pins 1 and 8 of chip 46bare connected to one side of the power input of the signal generatingmeans through a capacitor C7. Pin 1 is also connected to pin 5 through acapacitor C8. Pin 7 has as its input the voltage derived from a voltagedivider comprising a resistor R9 and a potentiometer P2. The Pin 6 ofthe chip is connected to the other side of the power input through acapacitor C9. Finally, pins 6 and 7 are tied together as are pins 2 and4.

Signal generating means 46 functions as a pulse width modulation signalgenerator whose output from pin 3 of chip 46b is supplied as an input ofan IC 50 of control means 42. Alternatively, the operating signal can beproduced by a microprocessor 52 as shown in FIG. 7B. Microprocessor 52is programmed to control the pulse width modulation of the signalproduced by means 44 as a function of various SRM operating parameterssuch as motor speed, torque, etc. The microprocessor is programmed withan algorithm which incorporates various monitored parameters into acalculation which determines desired characteristics (frequency, dutycycle, amplitude, etc.) of the operating signal supplied to the controlmeans.

Control means 42 is responsive to current sensing means 28 to controlthe operation of signal generating means 44. Both chips 40 and 50 are 14pin chips; chip 40 having the model designation CD4001, and chip 50 thedesignation CD4011BE. The operating signal output of signal generatingmeans 44 or 52 is supplied to control means 42 as an input to pin 13 ofchip 50. The power to the chips is provided from node 48a to pin 14 oneach chip, and from node 48b to pin 7 of each chip, Hall effect sensor30 provides an input to commonly connected pins 8 and 9 of chip 50 andto the normally open contact 54 of a switch 56. If desired, switch 56can be used to disengage the current control means controlling operationof circuit 10.

In addition to supplying its output to control means 42, the output ofsensor 30 is also provided to the base of a transistor Q2 through the abase biasing network comprising resistors R9-R11. Transistor Q2, inturn, provides an input to an opto-isolator means 58 through a resistorR12. Means 58 includes a model 4N35 type isolator 60 one side of whichdraws power from power supply means 32 through a resistor R13. Theopto-isolator controls switching of a transistor Q3 through a biasingresistor R14. The state of transistor Q3 controls application of powerto set 18 of MOSFET switches 22. Switch set 18 is operated so that theswitches are either "on" or "off". The switches are turned "on" when thephase is active, and "off" when the phase is inactive.

Control means 42 is responsive to the output of the Hall effect sensorto modify the signal characteristics of the operating signals providedby means 44 so these signals have one set of signal characteristics whenthe phase is active, and a different set of characteristics when thephase is inactive. Operation of control means 42 is that in response tothe Hall effect sensor indicating the phase has become inactive, thecontrol means reverses the duty cycle of the operating signal. Thus, ifthe operating signals, when the phase is active, is "on" 10% of a pulseperiod and "off" 90%, when the Hall sensor indicates the phase is nowinactive, the indication provided to pins 8 and 9 of chip 50 results inthe control means providing an operating signal which is "on" 90% of thetime, and "off" 10%. When the phase again becomes active, the Hallsensor output causes a reversal back to the initial duty cycleconditions. It will be understood that the relative "on/off" periods atany one time may differ from those at a different period. Also, themicroprocessor can override operation of the control circuit so thatunder certain defined motor conditions (a period range of motor speeds,for example) the control means will produce a particular set ofcharacteristics so when the "on/off" periods are reversed, the resultingoperating signal still has desired characteristics.

The inverted PWM operating signal is produced at pin 3 of chip 40. Thissignal is applied to the base of a transistor Q4 through a base resistorR15. The ouput of this transistor is supplied to node 24bat the gateinput of the MOSFET's 22 of switch set 20. Because the operating signalhas "on" and "off" portions, it effectively modulates the elements ofswitch set 20 so they alternately provide a hard chopping and a softchopping interval of tail current decay. Accordingly the zero voltage,current chopping dissipation of the tail current is effected with asingle set of switches producing both the hard chopping and softchopping decay strategies described above. This is shown in FIGS. 10Aand 10B. At time T₁, there is an initial zero voltage soft choppinginterval, followed by a shorter duration hard chopping interval. As seenin FIG. 9A, this process is repeated as the tail current is driven tozero. The longer soft chopping interval corresponds to the longer "on"interval of the operating signal, and the shorter hard chopping intervalto the shorter "off" period. It will be understood that the relativeintervals shown in FIGS. 9A and 9B are illustrative only.

It will be appreciated from the above discussion that one set ofoperating characteristics of circuit 10 is a reversal of duty cycle ofthe operating signal for a specified PWM frequency. However, withmicroprocessor 52 generating PWM signals it is possible to vary eitherthe duty cycle, frequency, or both within the tail current decay time.Referring to FIGS. 11A-11D examples are presented in which the dutycycle or frequency, or both is varied so that the soft chopping and hardchopping portions of an interval are controlled over the severalintervals during which the residual current decays to zero. The abilityto vary both frequency and duty cycle is important because it provides agreater degree of control over the current slope which permits betternoise control over the motor during residual current decay. In thecontrol scheme of FIG. 11A, there is a constant duty cycle of the PWMoperating signal during each interval I. Accordingly, the "on" portionof each duty cycle is constant throughout the current decay period T₁-T₂.

In FIG. 11B, the interval I is constant; however; the duty cycle isvaried from one interval to the next. This, for example effects a softchopping portion which gets progressively shorter during succeedingintervals while the hard chopping portion becomes progressively longer.

In FIG. 11C, the intervals are variable in duration so that interval I₁,is longer the interval I₂, etc. However, the duty cycle is constant sothat even though the soft and hard chopping portions of each intervalare of different lengths, this ratio is constant over the entire currentdecay period.

Finally, in FIG. 11D, both the interval I and duty cycle of the PWMoperating signals are variable. As noted, the particular PWMcharacteristics selected to control current decay are a function of theparticular SRM operating conditions and as such the chosen set ofcharacteristics may be employed each time the phase become inactive, ora different set may be chosen each time.

Regardless of the actual intervals at which hard chopping and softchopping occur, the frequency of the signals may be at least twice theresonant frequency of the motor. This prevents noise from being createddue to harmonics within the motor frame. It has been found that theeffect of circuit 10, in addition to efficiently producing tail currentdecay is to reduce the motor noise by approximately 10 dBA from a levelof some 50 dB. Further, it has been found that circuit 10 is usable witha variety of SRM's, including 2-phase and 3-phase SRM's.

What has been described is a control circuit for controlling tailcurrent decay in a SRM. The circuit operates to control tail currentdecay so as to lessen motor noise at least 10 dB from the 50 dB levelscurrently found in SRM's. As shown by the dashed line curve in FIG. 10,the motor ringing which occurs when circuit 10 is used is substantiallyreduced from the previous level of ringing. To accomplish this, thecontrol circuit combines both hard chopping and soft chopping currentdecay control techniques, doing so with but a single gate drive. Thecontrol circuit is usable with both 2-phase and 3-phase SRM's including12-6, 2-phase SRM's, and 6-4, 3-phase SRM's. The control circuit isreadily incorporated into a PWM type controller for controlling overallphase switching between the respective phases of a SRM. As part of itsoperation, the control circuit which reverses the pulse width ofgenerated PWM signals used to control current flow when a phase isinactive, this helping drive the tail current to zero while the phase isinactive. The control circuit employs two sets of switches; one setbeing either activated or deactivated as the motor phases are switched,and the other set of which is modulated by PWM signals. It is a featureof the control circuit to reverse the "on" and "off" portions of the PWMsignals when a phase is switched from active to inactive. The controlcircuit switches the phase winding into a path including a bus capacitorwhich is charged by the tail current using the PWM modulation of theswitches. The tail current control circuit is particularly effective inreducing noise in SRM's operating at low speed/high torque becausenormal ovalizing forces which produce noise in SRM's are lower at highspeed motor operation. This is because the control circuit varies bothfrequency and duty cycle to effect a desired soft chopping/hard choppingstrategy. Also, the control circuit operates at a frequency at leasttwice the resonant frequency of the motor. Finally, the control circuitprovides a low cost, reliable way of reducing noise throughout the rangeof SRM operation.

In view of the foregoing, it will be seen that the several objects ofthe invention are achieved and other advantageous results are obtained.

As various changes could be made in the above constructions withoutdeparting from the scope of the invention, it is intended that allmatter contained in the above description or shown in the accompanyingdrawings shall be interpreted as illustrative and not in a limitingsense.

Having thus described the invention, what is claimed and desired to besecured by Letters Patent is:
 1. A circuit for controlling residualcurrent decay in a single or polyphase SRM comprising:sensing means forsensing the position of a rotor of the motor; switch means for directingcurrent flow into a phase winding of the motor when the phase is activeand for recovering or dissipating energy in the winding when the phaseis inactive, the switch means comprising a first set of switches and asecond set of switches, said sets of switches being on respective sidesof the phase winding with one set of switches being activated when thephase is active, and deactivated when the phase is inactive; signalgenerating means providing an operating signal to the switch means tocontrol current flow and recovery or dissipation, the signal generatingmeans including a PWM signal generator whose output signal pulse widthand frequency are a function of the SRM's operating characteristics, thesecond set of switches being modulated by operating signals from thesignal generating means whereby operation of the second set of switchesis controlled as a function of the signal characteristics of theoperating signal; a capacitor connected in series with the phase windingand charged by the current in the phase winding when the phase becomesinactive thereby to recover a portion of the energy; and control meansresponsive to the sensing means for controlling the signal generatingmeans for the signal generating means to provide operating signalshaving operating characteristics which differ when a phase is active andwhen it is not, thereby to facilitate energy recovery or dissipationwhen the phase becomes inactive, the control means effecting bothfrequency and/or duty cycle of the operating signals to control the rateof decay of the current and consequently motor noise, the control meansbeing responsive to inputs from the sensing means when the phase becomesinactive to reverse the pulse width of the PWM operating signalsproduced by the signal generating means from those which are producedwhen the phase is active.
 2. The circuit of claim 1 wherein the controlmeans drives the signal generating means to produce an operating signalwhich provides a soft chopping of the tail current during one portion ofa pulse cycle, and a hard chopping the remainder of the cycle.
 3. Thecircuit of claim 2 further including gate means to which the PWM signalis supplied, the gate means deriving control signals for each set ofswitches from the PWM signals produced by the signal generating means todeactivate the first set of switches when the phase is inactive and tomodulate switching of the second set of switches in accordance with thePWM signal characteristics.
 4. The circuit of claim 1 wherein the firstand second set of switches each comprise a pair of semiconductorswitches connected in parallel.
 5. The circuit of claim 4 furtherincluding power supply means for each set of switches, each power supplymeans including transformer means for stepping down the line voltagesupplied to the SRM, and voltage regulator means for regulating thestepped down voltage.
 6. The circuit of claim 1 further includingrectification means for full-wave rectifying the phase voltage to thewinding.
 7. The circuit of claim 1 wherein the sensing means comprises aHall effect sensor.
 8. The circuit of claim 1 wherein the control meansincludes a microprocessor which receives inputs concerning the SRM'soperating characteristics and controls the signal characteristics of theoperating signal produced by the signal generating means as a functionof these inputs.
 9. Apparatus for controlling tail current decay in awinding of a single or polyphase SRM, current and voltage being appliedto the winding during each interval when the phase is active, thevoltage and current being cut-off from the winding when the phasebecomes inactive with the energy in the winding being recovered ordissipated under a zero volt condition, the apparatus comprising:a buscapacitor for storing energy recovered from the winding; switch meansfor connecting the phase winding into a circuit including the capacitorwhen the phase becomes inactive, the switch means including respectivefirst and second sets of switches with one set of switches beingconnected on one side of the winding and the other set of switches onthe other side thereof; power dissipation means series connected withthe winding; sensing means for sensing the position of a rotor of themotor; signal generating means providing an operating signal to theswitch means to alternately switch the winding into a circuit includingthe bus capacitor and a circuit including the power dissipation means,the operating signals being used to modulate the state of one of thesets of switches to provide both a hard chopping and a soft chopping ofthe current; and, control means responsive to the sensing means forcontrolling operation of the signal generating means for the signalgenerating means to provide operating signals having one set of signalcharacteristics when a phase is active, and a different set ofcharacteristics when the phase is inactive so to produce the zerovoltage, energy recovery and dissipation of the tail current, thecontrol means controlling both the frequency and duty cycle of theoperating signals to effect the recovery and dissipation of the tailcurrent and reduce motor noise.
 10. The apparatus of claim 9 wherein thecontrol means controls the signal generating means to maintain one ofthe sets of switches closed during the tail current decay period andswitch the other set of switches between their open and closed positionsat a rate controlled by the pulse width of the operating signalssupplied to this said other set of switches, the tail decay currentbeing soft chopped when the said other set of switches are closed, andhard chopped when the said other set of switches are open.
 11. Theapparatus of claim 10 wherein the signal generating means includes a PWMsignal generator whose output signal pulse width and frequency are afunction of the SRM's operating characteristics, the control means beingresponsive to inputs from the sensing means when the phase becomesinactive to reverse the duty cycle of the PWM operating signals producedby the signal generating means from those which are produced when thephase is active.
 12. The apparatus of claim 11 further including gatemeans for each set of switches to which the PWM signals are supplied,the gate means deriving control signals for each respective set ofswitches from the PWM signals to deactivate the first set of switcheswhen the phase is inactive and to modulate switching of the second setof switches in accordance with the PWM signal characteristics.
 13. Theapparatus of claim 9 wherein the sensing means comprises a Hall effectsensor.
 14. The apparatus of claim 9 wherein the control means includesa microprocessor which receives inputs concerning the SRM's operatingcharacteristics and controls the signal characteristics of the operatingsignal produced by the signal generating means as a function of theseinputs, the microprocessor adjusting both the frequency and duty cycleof the PWM signals.
 15. A method for controlling tail current decay in aphase winding of a single or polyphase SRM, current and voltage beingapplied to the phase winding during each interval when the phase isactive with the voltage and current being cut-off from the phase windingwhen the phase becomes inactive, the energy in the phase winding whenthe phase becomes inactive having to be recovered or dissipated under azero volt condition, the method comprising:switching the phase windinginto a circuit including a bus capacitor which stores current to recoverenergy while the phase is inactive, switching the phase winding into thecircuit including switching respective first and second sets ofswitches, one set of switches being connected to one side of the phasewinding and the other set of switches being connected on the other sidethereof; alternately switching the winding into an energy dissipationcircuit to dissipate a portion of the energy, the winding being switchedback and forth between the respective circuits over a plurality ofintervals so to decay the current in a controlled manner; sensing therotor position of the motor while the phase is inactive; generating andsupplying an operating signal to the switches to effect switching of thephase winding between the bus capacitor circuit and the energydissipation circuit; and, modulating the operation of one of the sets ofswitches with the operating signals whereby one set of switches remainsclosed throughout the interval when the phase is inactive and the otherset of switches is switched back and forth between open and closed at amodulating frequency determined by the signal characteristics of theoperating signal for the tail current to be hard chopped during eachinterval when both sets of switches are closed, and soft chopped duringeach interval when the one set of switches is closed and the other setof switches is open thereby to provide a zero volt current decay whichis controlled so as to minimize motor noise.
 16. The method of claim 15wherein generating an operating signal includes generating a PWM signalthe pulse width and frequency of which are a function of the SRM'soperating characteristics.
 17. The method of claim 16 wherein modulatingoperation of the one set of switches includes reversing the duty cycleof the PWM operating signals produced by a signal generating means fromthat which the operating signals have when the phase is active.
 18. Themethod of claim 16 wherein sensing the rotor position includes sensingwith a Hall effect sensor.
 19. The method of claim 15 further includingcontrolling the signal characteristics of the operating signals with amicroprocessor receiving inputs concerning the SRM's operatingcharacteristics.
 20. A method of decaying the residual current in awinding of a single or polyphase SRM, current being supplied to thewinding when the phase is active and the residual current being thecurrent remaining in the winding when the phase become inactive, themethod comprising:switching the winding between a first circuit which isan energy recovery circuit to recover a portion of the energyrepresented by the residual current and a second circuit which is anenergy dissipation circuit which dissipates a portion of the energyrepresented by the residual current; controlling the switching of thewinding between the energy recovery and energy dissipation circuits in acontrolled manner by which the residual current is decayed to zero so asto cause minimal ringing in the motor and thereby reduce motor noise,controlling switching of the winding including switching the windingbetween the circuits over a plurality of intervals with the windingbeing switched into one circuit for a portion of each interval and intothe other circuit the remainder of the interval, both the duration ofeach interval and the portion thereof in which the winding is switchedinto one circuit or the other being variable in a predetermined manner.21. The method of claim 20 wherein controlling switching of the windingbetween the respective circuits involves controlling at least one switchused to accomplish switching of the winding with PWM operating signals,the frequency and duty cycle of the PMW signals being variable to varyeither the length of each interval during which the winding is connectedto both of the respective circuits and the portion of each interval inwhich the winding is connected in one circuit or the other, the dutycycle of the PWM signals, or both. .Iadd.
 22. A circuit for controllingresidual current decay in a single or polyphase SRM comprising:switchesfor directing current flow into a phase winding of the motor when thephase is active and for recovering or dissipating energy in the windingwhen the phase is inactive, a PWM signal generator providing anoperating signal to the switches to control current flow and recovery ordissipation of residual current; a capacitor connected in series withthe phase winding and charged be the current in the phase winding whenthe phase becomes inactive thereby to recover a portion of the energy;and control means for controlling the signal generated by the PWM signalgenerator to provide operating signals having operating characteristicswhich differ when a phase is active and when it is not, thereby tofacilitate energy recovery or dissipation when the phase becomesinactive, the control means reversing the pulse width of the operatingsignals produced by the PWM signal generator when the phase becomesinactive from the pulse width of the operating signals which areproduced when the phase is active. .Iaddend..Iadd.23. Apparatus forcontrolling tail current decay in a winding of a single or polyphaseSRM, current and voltage being applied to the winding during eachinterval when the phase is active, the voltage and current being cut offfrom the winding when the phase becomes inactive with the energy in thewinding being recovered or dissipated under a zero volt condition theapparatus comprising: a capacitor for storing energy recovered from thewinding; switches for connecting the phase winding into alternatecircuit configurations when the phase becomes inactive; powerdissipation means connected with the winding; a signal generatorproviding an operating signal to the switches to alternately switch thewinding into a circuit including the capacitor and a circuit includingthe power dissipation means, the operating signals being used tomodulate the state of the switches to provide both a hard chopping and asoft chopping of the current; and control means for controllingoperation of the signal generator to provide operating signal having oneset of signal characteristics when a phase is active and a different setof characteristics when the phase is inactive so to produce the zerovoltage, energy recovery and dissipation of the tail current, thecontrol means controlling both the frequency and duty cycle of theoperating signals to effect the recovery and dissipation of the tailcurrent and reduce motor noise. .Iaddend..Iadd.24. A method forcontrolling tail current decay in a phase winding of a single orpolyphase SRM, current and voltage being applied to the phase windingduring each interval when the phase is active, with the voltage andcurrent being cut-off from the phase winding when the phase becomesinactive, the energy in the phase winding when the phase becomesinactive having to be recovered or dissipated under a zero voltcondition, the method comprising: switching the phase winding into arecovery circuit including a capacitor to recover energy while the phaseis inactive; alternately switching the winding into an energydissipation circuit to dissipate a portion of the energy while the phaseis inactive the winding being switched back and forth between the energyrecovery circuit and the energy dissipation circuit over a plurality ofintervals so to decay the current in a controlled manner; generating andsupplying an operating signal to control switching of the phase windingbetween the energy recovery circuit and the energy dissipation circuit;and modulating the operation of the switches with the operating signalsto provide repeated intervals of zero volt current decay which arecontrolled so as to minimize motor noise. .Iaddend..Iadd.25. A circuitfor controlling residual current decay in a winding of a switchedreluctance machine to reduce machine noise, the circuit comprising: a DCvoltage source providing a DC voltage, the DC voltage source definingpositive and negative DC rails; a phase winding, the phase windinghaving first and second ends; a switching circuit including a firstswitching device coupled to the positive DC rail and to the first end ofthe phase winding and a second switching device coupled to the negativeDC rail and to the second end of the phase winding, wherein the firstand second switching devices are controlled to: (i) electrically couplethe phase winding across the DC voltage source such that the negative ofthe DC voltage provided by the DC voltage source is applied across thephase winding, or (ii) electrically isolate at least one end of thechase winding from the DC voltage source such that the volume across thephase winding is approximately zero; anda control circuit coupled to theswitching circuit for controlling the first and second switching devicessuch that the voltage applied to the phase winding during the intervalof residual current decay comprises repeated periods of differingvoltage levels having a magnitude that is selected from at least one ofthe following values: (i) the negative of the DC voltage provided by theDC voltage source; or (ii) the voltage established by connecting thephase winding in a closed-loop circuit hit a semiconductor device..Iaddend..Iadd.26. A method of reducing the amount of noise produced bya switched reluctance machine, the switched reluctance machine having aplurality of phase windings, the method comprising the steps of:actively energizing a first phase windings such that the current in thefirst phase winding begins to increase from zero to a peak positivevalue over a first interval; and controlling the decay of the current ina second phase winding over the first interval by applying a pluralityof periods of differing voltage levels to the second phase winding overthe first interval, where the voltage levels have a magnitude selectedfrom the group of: a negative DC voltage or the voltage resulting fromconnecting the second phase winding in a closed-loop circuit with asemiconductor device; wherein the application of the plurality ofperiods of differing voltage levels applied to the second phase windingis controlled to reduce the amount of noise produced by the machine..Iaddend..Iadd.27. The method of claim 26 wherein plurality of periodsof differing voltage levels applied to the second phase winding includesperiods of voltage levels having a negative DC voltage magnitude andperiod, of voltage levels having a magnitude established by connectingthe second phase winding in a closed-loop circuit with a semiconductordevice. .Iaddend..Iadd.28. The method of claim 26 wherein: (i) theswitched reluctance machine includes at least one resonant frequency,and (ii) the step of controlling the decay of the current in the secondphase winding over the first interval by applying a plurality of periodsof differing voltage levels to the second phase winding includes thestep of applying the plurality of periods of differing voltages at afrequency that is at least twice the resonant frequency of the machine..Iaddend..Iadd.29. The method of claim 26 wherein the step ofcontrolling, the decay of the current in the second phase winding overthe first interval by applying a plurality of periods of differingvoltage levels to the second phase winding includes the step of varyingthe frequency at which the plurality of periods of differing voltage areapplied to the second phase winding. .Iaddend..Iadd.30. The method ofclaim 26 wherein the step of controlling the decay of the current in thesecond phase winding over the first interval by applying a plurality ofperiods of differing voltage levels to the second phase winding includesthe step of varying the duty cycle of the plurality of periods ofdiffering voltages applied to the second phase winding..Iaddend..Iadd.31. The method of claim 26 wherein the step ofcontrolling the decay of the current in the second phase winding overthe first interval by applying a plurality of periods of differingvoltage levels to the second phase winding includes the steps of: (i)varying the frequency at which the plurality of periods of differingvoltage are applied to the second phase winding, and (ii) varying theduty cycle of the plurality of periods of differing voltage applied tothe second phase winding. .Iaddend..Iadd.32. A method of reducing theamount of noise produced by a switched reluctance machine, the switchedreluctance machine having at least one phase winding, the methodcomprising the steps of:actively energizing a first phase winding over afirst interval such that the current in the first phase winding reachesa peak positive value; and controlling the decay of the current in thefirst phase winding over a second interval following the first intervalby applying a plurality of periods of differing voltage levels to thefirst phase winding over the second interval, where the periods ofdiffering voltage levels have a magnitude selected from the group of:(i) a negative DC voltage or (ii) the voltage resulting from connectingthe first phase winding in a closed-loop circuit with a semiconductordevice; wherein the application of the plurality of differing voltagelevels applied to the phase winding is controlled to reduce the amountof noise produced by the machine. .Iaddend..Iadd.33. The method of claim32 wherein the plurality of periods of differing voltage levels appliedto the first phase winding in the step of controlling the decay of thecurrent in the first phase winding includes periods of voltage levelshaving both a negative DC voltage magnitude and a voltage magnituderesulting from connecting the first phase winding in a closed-loopcircuit with a semiconductor device. .Iaddend..Iadd.34. The method ofclaim 32 wherein: (i) the switched reluctance machine includes at leastone resonant frequency, and (ii) the step of controlling the decay ofthe current in the first phase winding over the second interval byapplying a plurality of periods of differing voltage levels to the firstphase winding includes the step of applying the plurality of periods ofdiffering voltage at a frequency that is at least twice the resonantfrequency of the machine. .Iaddend..Iadd.35. The method of claim 32wherein the step of controlling the decay of the current in the firstphase winding over the second interval be applying a plurality ofperiods of differing voltage levels to the first phase winding includesthe step of varying the frequency at which the plurality of periods ofdiffering voltage are applied to the first phase winding..Iaddend..Iadd.36. The method of claim 32 wherein the step ofcontrolling the decay of the current in the first phase winding over thesecond interval by applying a plurality of period, of differing voltagelevels to the first phase winding includes the step of varying the dutycycle of the plurality of periods of differing voltage applied to thefirst case winding. .Iaddend..Iadd.37. The method of claim 32 whereinthe step of controlling the decay of the current in the first phasewinding over the second interval by applying a plurality of periods ofdiffering voltage levels to the first phase winding includes the stepsof: (i) varying the frequency at which the plurality of periods ofdiffering voltage are applied to the first phase winding and (ii)varying the duty cycle of the plurality of periods of differing voltageapplied to the first phase winding. .Iaddend..Iadd.38. Apparatus forcontrolling the decay of current in the phase winding of a switchedreluctance machine from a positive value to zero, the apparatuscomprising:a DC voltage source; a switching device coupled to thevoltage source and to the phase winding for controlling the applicationof voltage to the phase winding; a control circuit coupled to theswitching device, the control circuit adapted to provide a series ofpulsed gating signals to the switching device to control the switchingdevice such that the current in the phase winding falls from thepositive value to zero in a controlled fashion. .Iaddend..Iadd.39. Theapparatus of claim 38 wherein the series of pulsed gating signalsprovided by the control circuit is such that the voltage applied to thephase winding during the period of current decay repeatedly varies froma negative voltage magnitude to approximately zero volts..Iaddend..Iadd.40. A method of controlling current in a switchedreluctance machine, the machine including a rotor, and a phase winding,the method comprising the steps of:applying electrical power to thephase winding over a first interval of rotor rotation such that thecurrent in the phase winding increases from zero to a positive value;and controlling the application of electrical power to the phase windingfor a period following the first interval such that the current in thephase winding decreases from the positive value to zero through two ormore decay intervals, where the slope of the current decay varies overeach decay interval. .Iaddend..Iadd.41. The method of claim 40 whereinthe step of controlling the application of electric power to the phasewinding includes the steps of: (i) applying a negative voltage to thephase winding over a first decay intervals and (ii) applying a voltageresulting from connecting the phase winding in a closed-loop circuitwith a semiconductor device to the phase winding over a second decayinterval; wherein the slope of the current decay over the second decayinterval is less than the slope of the current decay over the firstdecay interval. .Iaddend..Iadd.42. The method of claim 40 wherein thestep of controlling the application of electric power to the phasewinding includes the step of applying a series of pulse width modulatedvoltage pulses to the phase winding. .Iaddend.